A leading semiconductor company is seeking a Layout Design Methodology Engineer in Ottawa to advance IC design methodologies. This role requires expertise in layout automation, knowledge of EDA tools like Cadence Virtuoso, and strong communication skills. The successful candidate will drive layout productivity and collaborate with global teams to ensure quality designs.
Candidates should have 3–8+ years of experience with proven success in tapeouts and a solid grasp of layout principles including matching and shielding.
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