Job Title - Memory I/O (DDR/LPDDR) Firmware Engineer
Job Location - Markham, ON or Vancouver, BC
Project Duration - 12 Months + Chances of its further extension
Job Description -
The Memory IO team is looking for a passionate and experienced Firmware designer for infrastructure support of high-speed LPDDR, DDR and inter-chip IO IP development. Be a part of the definition, design and development and productization phase of industry-leading Memory PHYs and interface IP. This opportunity is part of the driving force that enables new PHY designs at the microarchitecture, firmware/hardware co-design, and algorithm design level.
Be a part of a team that delivers Industry leading IP and help our experts in RTL, FW, circuit and architecture teams develop leading edge Memory interfaces.
RESPONSIBILITIES:
• Implement and maintain complex continuous integration systems for the codebase in GitHub Actions to ensure robust build and test processes across diverse environments and systems
• Manage the code integration with external codebases to maintain compatibility and synchronization with other teams' code (both upstream and downstream components)
• Monitor the health of the main branch's CI, quickly detecting, tracing, and resolving failures to ensure stability and performance
• Create and manage releases using bespoke processes to ensure thorough QA and testing to meet quality standards
• Assist teammates with conflict resolution and coordinate conflicting pull requests, optimizing GitHub workflows for efficiency if necessary
• Debug system-level tests in multiple unique environments for comprehensive test coverage and reliability
• Conduct post-silicon lab bring-up and optimization for DDR training, runtime operation, and diagnostic features
Preference & Skill Sets :
• +5 years’ experience as firmware engineer
• Extensive experience with CI/CD, GitHub, and GitHub Actions
• Proficiency in C, C++, Python, and languages like JSON and YAML
• Ability to quickly learn and apply new toolsets and frameworks
• Excellent written and verbal communication skill
• Quick learner, self-starting, independent, and ownership-minded
• Systematic, analytical, and detailed-oriented approaches to issues involving complex systems
• Experience with SERDES, DDR, Memory Controller Design
• Understanding of computer organization/architecture is preferred.
• Laboratory experience, including the use of equipment: oscilloscopes, logic analyzers, etc is preferred
EDUCATION:
• Bachelor’s degree in electrical or computer engineering is strongly desired. Master's or PhD degree is a plus.
